Platform Security Hardware Intern

Confirmed live in the last 24 hours

Rivos

Rivos

No salary listed

Santa Clara, CA, USA + 1 more

More locations: Portland, OR, USA

In Person

Responsibilities:

  • Architecture/microarchitecture definition, RTL Design/implementation of security functions
  • Hardware design security verification using formal and non-formal methods.

Requirements:

  • RTL design and / or verification tools, flows and methods 
  • Familiarity with tools to prove security properties of a system or find vulnerabilities 
  • Familiarity with System verilog, FPGA tools
  • Familiarity with mapping security primitives to low-level hardware interfaces, and impact on hardware-software codesign is a plus
  • Familiarity with (RISC-V) assembly/C/C++/Rust is a plus 
  • Excellent skills in problem solving, written and verbal communication
  • Highly self-motivated and able to work well in a team under aggressive schedules


Education:

  • Typically enrolled in a Masters/Ph.D. program in CS/CE/EE

Platform Security Hardware Intern @ Rivos | InternList.org