Physical Design Engineer Intern

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Marvell Physical Design team is located in our Boise, ID office, and has s a long history of successful design tapeouts in advanced process nodes. Our
team is made up of both newer and more experienced engineers with a broad depth of physical design engineering experience. Being a part of our team will
give you a chance to work on many different aspects of the chip design process, while working alongside some of the best engineers in the industry.

What You Can Expect

• As an intern on the Physical Design team, you will have the opportunity to: Participate in layout and design from RTL to tapeout
• Be completely integrated into a leading physical design team and contribute to deliveries on best-in-class products and technologies
• Have exposure to leading-edge design techniques with the latest industry standard tools and processes
• Be a part of a small high performing team allowing for high impact work that spans the entire spectrum of physical design

What We're Looking For

Minimum Qualifications:

• Must be currently pursuing a master's degree in Electrical Engineering, Computer Engineering, or other related fields with an anticipated graduation date between Winter 2026 and Spring 2027
• Exposure to scripting/programming (TCL/TK/Perl/Python)
• Coursework in digital logic, circuit design, and/or computer architecture

Preferred Qualifications:

• Some exposure to Linux/Unix commands and shell scripting
• An understanding of hardware design language (Verilog or VHDL)
• General knowledge or experience with RTL synthesis, place and route, and/or static timing analysis

Expected Base Pay Range (USD)

28 - 55, $ per hour.

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

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